Evolutionary Algorithms for VLSI CAD

Formal Verification of Circuits

Advanced Formal Verification

Towards One-Pass Synthesis

Towards a Design Flow for Reversible Logic

High Quality Test Pattern Generation and Boolean Satisfiability

Reversible and Quantum Circuits: Optimization and Complexity Analysis

Debugging at the Electronic System Level

Design for Testability, Debug and Reliability: Next Generation Measures Using Formal Techniques

Formal Specification Level: Concepts, Methods, and Algorithms

Automated Analysis of Virtual Prototypes at the Electronic System Level: Design Understanding and Applications

In-Memory Computing: Synthesis and Optimization

Quality-Driven SystemC Design

Robustness and Usability in Modern Design Flows

Enhanced Virtual Prototyping: Featuring RISC-V Case Studies

Enhanced Virtual Prototyping for Heterogeneous Systems

Exact Design of Digital Microfluidic Biochips

Automatic Methods for the Refinement of System Models: From the Specification to the Implementation

Design Automation Techniques for Approximation Circuits: Verification, Synthesis and Test

Spectral Techniques in VLSI CAD