Low Power Networks-on-Chip
Cristina Silvano · Marcello Lajolo · Gianluca Palermo
sen, 2010 · Springer Science & Business Media
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287
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In recent years, both Networks-on-Chip, as an architectural solution for high-speed interconnect, and power consumption, as a key design constraint, have continued to gain interest in the design and research communities. This book offers a single-source reference to some of the most important design techniques proposed in the context of low-power design for networks-on-chip architectures.
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